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India joins America-led Pax Silica supply chain effort to build semiconductor talent and reduce reliance on China — agreement spans from rare earths to chipmaking tools

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The alliance targets semiconductors, AI infrastructure, and rare-earth minerals.

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Nvidia CEO denies that US wants to shift 40% of Taiwan's chipmaking capacity to America — Jensen Huang says onshoring is all new capacity, will preserve island nation's silicon shield

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Silicon shield will remain with Taiwan.

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Samsung’s Chances Of Securing Orders From Qualcomm Are Reportedly Increasing, With The Foundry Giant Estimated To Turn A Profit Next Year As 2nm GAA Gains Momentum

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As Samsung’s 2nm GAA yields slow gradual improvement, a report states that the company’s chances of securing orders from Qualcomm are increasing

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TSMC says AI demand is “endless” after record Q4 earnings

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Amid fears of bubble, world’s top chipmaker TSMC says customers just keep asking for more.

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Apple-TSMC: The Partnership That Built Modern Semiconductors

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Wafer demand model, node economics, and the shifting power dynamics as AI reshapes the foundry landscape

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Nvidia needs TSMC's help to meet Chinese H200 demand

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China mandates 50% domestic equipment rule for chipmakers, sources say

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TSMC begins quietly volume production of 2nm-class chips — first GAA transistor for TSMC claims up to 15% improvement at ISO power

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As planned.

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[Le Monde] Europe's relentless semiconductor decline

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Source Le Monde article

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US punishes China’s chip ‘dominance’ [in mature nodes] with 0% tariffs [until mid 2027]

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Taiwan considers TSMC export ban that would prevent manufacturing its newest chip nodes in U.S. — limit exports to two generations behind leading-edge nodes, could slow down U.S. expansion

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Largely maintained for now, it is set to go in the future.

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Nanoimprint over EUV Lithography: Japan Aims to Cut Costs for 1.4nm Chip Production

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In the semiconductor industry, dominated by the expensive EUV lithography technology, an alternative is emerging on the horizon. Japanese companies Canon and Dai Nippon Printing (DNP) are actively developing a nanoimprint method. They estimate it will enable the creation of chips with 1.4-nanometer features at significantly lower costs.

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